Rectifier loads are rapidly increased following employing of an inverter for air conditioning apparatus, lighting devices or the like in recent years. The rectifier loads have greater generation amount of higher harmonics in comparison to those of conventional A.C. devices. Therefore, voltage deformation is generated in a power system, disadvantages such as humming, combustion or the like of a phase advancing capacitor and a transformer. A higher harmonicas suppression guide line and an IEC standard are established for dealing with such disadvantages.
Under such condition, a circuitry of FIG. 20 in which a voltage doubler rectification circuitry illustrated in FIG. 15 is employed as a fundamental circuitry, is proposed as a system which enables improvement in power factor and decreasing in higher harmonics of a capacitor input type rectification circuitry (refer to "Higher Harmonics Decreasing Method of a Single Phase Diode Rectification Circuitry", Denki Gakkai Handoutai Denryoku Henkan Kenshi SPC-96-3, for example).
The circuitry of FIG. 20 is different from the circuitry of FIG. 15 in that a couple of A.C. capacitors connected in series to one another are employed instead of a pair of electrolytic capacitors connected in parallel to one another. That is, capacitances of the pair of serial capacitors are determined to be smaller, the capacitors being employed for obtaining a D.C. center point voltage. And, a current conduction angle is enlarged by pulsating the center point voltage following charging and discharging of the capacitors by the A.C. power source.
The voltage doubler rectification circuitry, illustrated in FIG. 15, operates by two modes (refer to mode 1 and mode 3) so that a voltage which is about double of a peak value of a power source wave (refer to FIG. 18 which represent voltage waveform of each section and FIG. 19 which represent current waveform of each section). The two modes alternately charge the pair of serial capacitors using half waves of the power source, the serial capacitors being connected in series to a D.C. section.
When the capacitances of the pair of serial capacitors connected to the D.C. section are determined to be small so as to discharge the corresponding serial capacitor within a time interval of a half cycle of the power source, the corresponding serial capacitor is fully discharged within the time interval of the half cycle of the power source, as is illustrated in FIG. 20. Therefore, the D.C. voltage becomes smaller than the peak value of the power source wave so that operation modes (refer to mode 2 in FIGS. 22, 25 and 26, and mode 4 in FIGS. 24, 25 and 26) for full wave rectification are generated. Further, the serial capacitors are started their charging from timings when the power source voltage is 0 so that the conduction angle in current is enlarged and the power factor is improved.
This circuitry is charged and discharged using the half waves of the power source voltage so that a voltage pulsating extent of the serial capacitors becomes 0.+-.Vdc1. A.C. capacitors are suitable as the serial capacitors employed in the circuitry because of the limitation in ripple currents. But, the D.C. voltage of Vdc1/2 is overlapped, as is illustrated in FIG. 25, so that the disadvantage arises in that the voltage utilization factor becomes bad.
In other words, the capacitance of the serial capacitor has a small value which is about 1/10 of that of the voltage doubler rectification circuitry, so that a ripple current flowing through the serial capacitor is great. Therefore, the application of a cheap electrolyte capacitor is difficult which is popularly employed in a D.C. circuitry. The reason is that the capacitance and the ripple current have a proportional relationship to one another. An A.C. capacitance having a great allowable current is employed, accordingly. But, enlargement in size and increase in cost are generated in an entire rectification circuitry, because a D.C. voltage which is half of an output voltage of a rectification circuitry is overlapped to the A.C. capacitor and consequently the A.C. capacitor should have a rated voltage which corresponds to an A.C. voltage which is to be applied.
Further, a system which has a voltage four times or three times rectification circuitry as a fundamental arrangement is proposed as a system which improves the power factor and decreases higher harmonics of the voltage doubler rectification circuitry (refer to "Higher Harmonics Decreasing Method of a Single Phase Diode Rectification Circuitry", Ken-Ichiro Fujiwara, Hiroshi Nomura, Denki Gakkai Handoutai Denryoku Henkan Kenshi SPC-96-3, and "Single Phase Diode Rectification Circuitry Having Small Higher Harmonics Current", Isao Takahashi, Kazutaka Hori, Dengakuron D, Vol. 115, No. 10, Heisei 7 nen, pp1215-1220). "Higher Harmonics Decreasing Method of a Single Phase Diode Rectification Circuitry" among them enlarges the conduction angle in current by determining the capacitance of the two serial capacitances for obtaining the D.C. center point voltage and by pulsating the center point voltage by charging and discharging due to the A.C. power source. Further, "Single Phase Diode Rectification Circuitry Having Small Higher Harmonics Current" is an improved example from the voltage three times rectification circuitry.
Each system performs charging and discharging using a capacitor in multiple stages so that enlargement in size and increase in cost in a device are caused by increase in a number of parts. Therefore, each system is difficult to be applied to a device in practice.
The present invention was made in view of the above problems.
It is an object of the present invention to offer a single phase rectification apparatus which enables decrease in size and decrease in cost in its entirety.